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TC78B002FTG 2013-03-19 1 toshiba cmos integrated circuit silicon monolithic TC78B002FTG single phase full-wave driver for fan motor TC78B002FTG is a single phase full- wave driver for fan motor. it has a dmos device in an output transistor. a highly effective drive is possi ble by adopting a dmos output driver with low on resistance and a pwm drive system. features ? single-phase full-wave drive ? motor power supply voltage: vm =16v (maximum operating range) ? output current: iout = 1.5a (max.) ? pwm control ? built-in oscillation circ uit (external resistor) ? soft switching drive ? lock protection, automatic recovery ? quick start ? built in hall bias ? rotation speed detection (fg) an d lock detection (rdo) output ? current limit function ? built in over current protection ? built in thermal shut down circuit TC78B002FTG weight: 0.02g (typ) p-wqfn16-0303-0.50-002 http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 2 block diagram (application circuit) 0.1uf 24k http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 3 pin assignment out2 vm rs vmi hp vsoft vreg gnd http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 4 pin description pin no. pin name description 1 hm hall signal input pin 2 oscr connection pin for resist or of oscillation circuit 3 rdo output pin for lock detection 4 out1 motor output pin 1 5 gnd connection pin for ground 6 rs connection pin for detecting resistor of output current 7 vm power supply pin 8 out2 motor output pin 2 9 fg rotating output pin 10 vsp setting pin for output duty 11 voff setting pin for off te rm in switching conducting phase 12 la setting pin for lead angle 13 vmi setting pin for minimum output duty 14 vsoft setting pin for soft switching term 15 vreg output pin for reference voltage of 5 v 16 hp hall signal input pin + http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 5 absolute maximum ratings (ta = 25c) characteristics symbol rating unit power supply voltage v m 18 v input voltage v in -0.3~6 (note 1) v output voltage v out 18 (note 2) v out1,out2 i out 1.5 (note 3) a output current vreg i out 10 ma fg pin sink current i fg 10 ma rdo pin sink current i rdo 10 ma power dissipation p d 2.5 (note 4) w operating temperature t opr -40 to 105 c storage temperature t stg -55 to 150 c note: the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding t he rating (s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. please use the ic within the specified operating ranges. note 1: vmi, vsp, vsoft, voff, and la pins note 2: out1, out2, fg and rdo pins note 3: power dissipation must not be exceed note 4: mounted on a glass epoxy board (74mm74mm1.6mm 4 layers, fr-4 board) package power dissipation (1) when mounted on the board (74mm74mm1. 6mm 4 layers, fr-4 board) rth(j-a)=50 /w (2) when mounted on the board ( ? 40mm1.6mm 1 layer, fr-4 board) rth(j-a)=160 /w operating ranges (ta = 25c) characteristics symbol min typ. max unit power supply voltage v m opr1 5.5 12 16 v power supply for low voltage operation vm opr2 3.5 4.5 5.5 v internal oscillation frequency (note 1) f osc 8 10 12 mhz pwm frequency f pwm 20 25 30 khz input voltage (note 2) v in 0 v reg v note 1: in low-voltage operation, operation with frequ ency more than 10mhz is not covered under guarantee. note 2: vmi, vsoft, voff, and la pins 0 0.5 1 1.5 2 2.5 3 0 25 50 75 100 125 150 p d (w) ta ? ( ` ) (1) (2) http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 6 electrical characteristics (ta = 25c and v m = 12 v, unless otherwise specified.) characteristics symbol test conditions min typ. max unit power supply current i vm v m = 12 v, v reg = open hall input=100hz, output open ? 3 5 ma common mode input voltage range v cmrh 0 ? v reg -1.5 v input voltage swing v h 40 ? ? mv input current ih |v hp -v hm | : 100mv ? ? 1 a hysteresis 9 voltage v hhys+ (design target value) (note 1) 5 10 15 mv hall signal input hysteresis 9 voltage v hhys- (design target value) (note 1) -15 -10 -5 mv vreg pin voltage v reg vreg pin output source current=10ma 4.5 5.0 5.5 v maximum voltage of adc convertor v adc (design target value) (note 1) ? v reg -0.75 ? v duty(20) r osc =24k ? , output load:1k ? v sp =1.2v, v mi =0v or v mi =1.2v, v sp =0v 15 20 25 % duty(50) r osc =24k ? , output load:1k ? v sp =2.2v, v mi =0v or v mi =2.2v, v sp =0v 43 50 57 % output on duty (note 1) duty(80) r osc =24k ? , output load:1k ? v sp =3.2v, v mi =0v or v mi =3.2v, v sp =0v 70 80 90 % v ad (l) threshold voltage of stopping output 0.5 0.55 ? vsp threshold v ad (h) threshold voltage of full output ? 3.9 4.3 v vsp response time t vsp (design target value) (note 1) ? ? 10 ms internal oscillation frequency f osc r osc =24k ? measured by internal divided frequency 8 10 12 mhz pwm frequency f pwm r osc =24k ? 20 25 30 khz pin input current i in vsp,vmi,vsoft,voff, and la pins input voltage 0~v reg ? ? 1 a output on resistance ron(h+l) i out = 0.2a ? 1.6 2.5 ? t soft (0) r osc =24k ? , hall input=100hz voff=0v , vsoft=0v ? ? 0 t soft (45) r osc =24k ? , hall input=100hz voff=0v , vsoft=v reg *0.45 43 ? 47 soft switching time (note 1) t soft (90) r osc =24k ? , hall input=100hz voff=0v , vsoft= v reg 84 ? 90 t off (0) r osc =24k ? , hall input=100hz vsoft=0v, voff=0v ? ? 0 t off (45) r osc =24k ? , hall input=100hz vsoft=0v, voff= v reg *0.45 43 ? 47 off term (note 1) t off (90) r osc =24k ? , hall input=100hz vsoft=0v, voff= v reg 84 ? 90 t la (0) r osc =24k ? , hall input=100hz la=0v ? ? 0 t la (11.25) r osc =24k ? , hall input=100hz la= v reg *0.23 10 ? 12 lead angle correction (note 1) t la (22.5) r osc =24k ? , hall input=100hz la= v reg 21 ? 24 http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 7 characteristics symbol test conditions min typ. max unit output low voltage v out (l) i fg/rdo =5ma ? ? 0.3 v fg rdo pin output leakage current i out (h) v fg/rdo =5v ? ? 1 a current limit detecting voltage for rs pin v rs 0.27 0.3 0.33 v masking time of current limit detection t mask (design target value) (note 1) 1.2 1.5 1.8 s operating current of over current protection i lim (design target value) (note 1) ? 2.5 ? a masking time of over current protection t isdmask (design target value) (note 1) ? 2 ? s off time of over current protection t isdoff (design target value) (note 1) ? 100 ? ms operating temperature of thermal shutdown circuit t sd junction temperature (design target value) (note 1) ? 170 ? hysteresis of thermal shutdown circuit ? t sd (design target value) (note 1) ? 40 ? on time of lock detection t on r osc =24k (design target value) (note 1) 0.32 0.4 0.48 s off time of lock detection t off r osc =24k (design target value) (note 1) 3.2 4 4.8 s v uvlo operation voltage (design target value) (note 1) 2.6 2.9 3.2 v detecting voltage for low voltage v porrl recovery voltage (design target value) (note 1) 2.9 3.2 3.5 v t r (design target value) (note 1) ? 100 ? output switching characteristics t f (design target value) (note 1) ? 100 ? ns note 1: pre-shipment testing is not performed. http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 8 reference data fig.1 power supply current fig.2 hall input hysteresis voltage fig.3 vreg pin voltage (vm=12v) fig.4 vreg pin voltage (ta=25 ) fig.5 output on resistance (vm=12v) fig.6 output on resistance (ta=25 ) r 20 r 10 0 10 20 369121518 hall input hysteresis voltage. v hhys [mv] supply voltage. vm[v] 125 25 40 operation voltage range r 40 25 125 4.6 4.7 4.8 4.9 5 0246810 vreg output voltage. v reg [v] output current. i vreg [ma] 125 25 40 2 3 4 5 6 0246810 vreg output voltage. v reg [v] output current. i vreg [ma] 18v 12v 3.5v 0 1 2 3 4 0 0.3 0.6 0.9 1.2 1.5 ouput on resistance.r on(h+l) [ o ] output current. i out [a] 125 25 40 0 1 2 3 4 0 0.3 0.6 0.9 1.2 1.5 ouput on resistance.r on(h+l) [ o ] output current. i out [a] 3.5v 12v 1 2 3 3 6 9 12 15 18 power supply current. i vm [ma] supply voltage. vm[v] 125 25 40 operation voltage range http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 9 fig.7 fg/rdo pin output low voltage (vm=12v) fig.8 fg/rdo pin output low voltage (ta=25 ) fig.9 internal oscillation frequency fig.10 current limit detecting voltage for rs pin 0 0.2 0.4 0.6 0.8 1 0246810 fg low voltage. v out(l) [v] output current. i fg/rdo [ma] 125 25 40 0 0.2 0.4 0.6 0.8 1 0246810 fg low voltage. v out(l) [v] output current. i fg/rdo [ma] 3.5v 12v 8 9 10 11 12 3 6 9 121518 internal oscillation frequency . f osc [mhz] supply voltage. vm[v] 125 25 40 operation voltage range 0.28 0.29 0.3 0.31 0.32 3 6 9 121518 current limit detecting voltage . v rs [v] supply voltage. vm[v] 125 25 40 operation voltage range http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 10 i/o equivalent circuits pin name i/o signal equivalent circuit hp hm hall signal input pin in-phase input voltage range 0v to v reg -1.5v vsp vmi la control voltage input pin vsoft voff control voltage input pin vreg voltage output pin v reg = 5v (typ) fg rdo digital output pin open drain output it should be pulled up externally to output high. vsp vmi la fg rdo hp hm vreg vreg vsoft voff vreg vreg vm http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 11 pin name i/o signal equivalent circuit vm out1 out2 rs motor output pin oscr connection pin for resistor of oscillation circuit out1 out2 vm rs 0.3v oscr vreg vreg http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 12 functional description the equivalent circuit diagrams may be simplified or some parts of them may be omi tted for explanatory purposes. timing charts may be simplified for explanatory purposes. 1. basic operation at startup, the motor is driven by a square-wave drive by determining the conducting phase with hall input signal. when hall signal frequency reaches 5hz (typ) or more, th e motor is driven by the conducting pattern which is generated by estimating the next conducting timing from the hall input signal. hp hm out1 out2 fg rdo mode h l l pwm off l l h pwm l l l rotating (note 1) h l l off off ? l h off l l ? current limit drive (note 2) ? ? off off ? off lock protection (note 3) ? ? off off ? ? thermal shutdown note 1 conducting phase is switched by the hall input signal. fg signal is outputted according to the phase-switching. conducting timing may be preceded depending on the lead angle set. note 2 upper power transistor is turned off during current limit ation. it recovers automatically every pwm frequency. note 3 fg output changes depending on the rotor position in the lock protection mode the same as rotating mode. timing chart (normal rotation) with soft switching, with lead angle without soft switching, w ithout lead angle http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 13 timing chart (lock protection) 2. vsp/ vmi input pin output starts when vsp pin at the voltage of more than v ad(l) . and it turns off at the voltage of v ad(l) or less. minimum voltage of vsp pin is clipped by the voltage of vmi pin. in case the minimum duty setting by vmi pin is not used, connect the vmi pin to the gnd pin. analog voltage which is input to vsp pin and vmi pin is converted by ad convertor of 7 bit, and the output pwm duty is controlled. 0 vsp, vmi v ad (l) duty = 0% v ad (l) < vsp, vmi v ad (h) below figure (17/127 to 116/127) v ad (h) < vsp, vmi v reg duty = 100% (117/127 to 127/127) (pwm duty indicates the peak value of output beca use this circuit has a soft switching function.) 3. hall input signal characteristics of hall signal shown be low are inputted to the hall input pin. v h : 40mv or more v hhys+ =10mv, v hhys- =-10mv *though hall amplifier operates when v h is 40mv or more, please widen the oscillation as possible to stabilize the time width. (200mv or more is recommended.) voltage range of hall input http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 14 4. osc frequency and pwm frequency oscillation frequency is appr oximated by below formula. f osc = 1/(2c[f] r osc []) [hz]= 1/(2 2.08e-12[f]r osc []) [hz] oscillation frequency f osc is 10mhz(typ) when external resistor rosc is 24k pwm frequency f pwm =f osc /400. 5. pwm output drive in pwm drive, upper power transistor is turned on and off repeatedly. in switching phase, power transi stor operates in below order. 6. startup sequence output starts when vsp pin at the voltage of v ad(l) or more. in order to ensure the starting torque, pwm output is 50% duty when the motor rota ting speed is lower than 5hz (typ). when output phase is switched during startup sequence, pwm off term of 1ms (typ) is inserted to reduce the regenerating current to the power supply. pwm on pwm on off pwm on vm r f m rs pwm on pwm off pwm off pwm on short brake 200ns (design target value) 50% duty output duty is output by vsp voltage http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 15 7. turning off output turns off when the voltage of vsp pin is v ad(l) or less. before all output power transistors are turned off, the time, until the edge of fg signal is detected twice or the frequency of 5 hz or less is detected, is defined pwm off term. detecting 5hz or less 0.55v 0.55v http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 16 8. soft switching soft switching is performed by changing the output pwm duty gradually when conducting phase switches. the time of soft switching is determined by the voltage of vsoft pin and that of voff pin. t soft > t off t soft < t off voltage of vsoft > voltage of voff: total term of soft switching (tsoft) is determined by the time of prior hall signal (180) and the voltage of vsoft pin. off term is provided during soft switching. the time of off term (toff) is determined by the prior hall signal (180) and the voltage of voff pin. during o ff term, the state of the powe r transistor is in the pwm off mode. soft switching operates in the period other than the off term, and output pwm duty changes by 16 steps in maximum. voltage of vsoft < voltage of voff: it does not have the term of soft switching operatio n which changes the duty, but it has the off term. off term (toff) is determined by the time of the prior ha ll signal (180) and the voltage of voff pin. during off term, the sate of the power transistor is in the pwm off mode. when next edge does not occur though time of t1? passes, last output state continues. conducting pattern is reset in synchronization with the up edge and the down edge of the hall signal. so, waveform indicates non-contiguous every reset when hall signal is offset and in speed up/slow down mode. hp-pm out1 out2 t1 t1' t off t soft t off t soft t soft ? ? ? t off t soft t off hp-pm out1 out2 t1 t1' t off t soft t off t soft http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 17 vsoft 0v 0 vsoft v adc 87.2 (in case voltage of v adc or more is input, it is set to 87.2.) step vsoft (v) te r m () step vsoft (v) te r m () step vsoft (v) te r m () 1 0.00 0.0 12 1.51 30.9 23 3.02 61.9 2 0.14 2.8 13 1.65 33.8 24 3.15 64.7 3 0.27 5.6 14 1.78 36.6 25 3.29 67.5 4 0.41 8.4 15 1.92 39.4 26 3.43 70.3 5 0.55 11.3 16 2.06 42.2 27 3.56 73.1 6 0.69 14.1 17 2.19 45.0 28 3.70 75.9 7 0.82 16.9 18 2.33 47.8 29 3.84 78.8 8 0.96 19.7 19 2.47 50.6 30 3.98 81.6 9 1.10 22.5 20 2.60 53.4 31 4.11 84.4 10 1.23 25.3 21 2.74 56.3 32 4.25 87.2 11 1.37 28.1 22 2.88 59.1 term http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 18 < relation between the voltage of vo ff pin and the term of turning off> voff 0v 0 voff v adc 87.2 (in case voltage of v adc or more is input, it is set to 87.2) step voff (v) te r m () step voff (v) te r m () step voff (v) te r m () 1 0.00 0.0 12 1.51 30.9 23 3.02 61.9 2 0.14 2.8 13 1.65 33.8 24 3.15 64.7 3 0.27 5.6 14 1.78 36.6 25 3.29 67.5 4 0.41 8.4 15 1.92 39.4 26 3.43 70.3 5 0.55 11.3 16 2.06 42.2 27 3.56 73.1 6 0.69 14.1 17 2.19 45.0 28 3.70 75.9 7 0.82 16.9 18 2.33 47.8 29 3.84 78.8 8 0.96 19.7 19 2.47 50.6 30 3.98 81.6 9 1.10 22.5 20 2.60 53.4 31 4.11 84.4 10 1.23 25.3 21 2.74 56.3 32 4.25 87.2 11 1.37 28.1 22 2.88 59.1 term http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 19 soft switching after conducting phase switch: it changes gradually from 4% to 100% of output pwm duty determined by the voltage of vsp pin. its number of steps is 16 in maximum. soft switching before conducting phase switch: it changes gradually from 100% to 4% of output pwm duty determined by the voltage of vsp pin. its number of steps is 16 in maximum. in case the term of soft switching op eration is 22.5 or less, number of step s is less than16 in the soft switching term. the relation of steps of soft switching and the output pwm duty ratio is shown below. step output ratio (%) step output ratio (%) step output ratio (%) 1 4 7 59 13 94 2 14 8 67 14 97 3 25 9 74 15 99 4 34 10 80 16 100 5 42 11 86 6 52 12 91 output ratio steps of pwm change term of soft switching operation http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 20 9. lead angle lead angle of the conducting signal can be set in the range of 0 to 22.5 against the hall signal. lead angle is set by analog input of la pin (the range of 0 to v adc is divided into 32 steps and lower 17 steps are used.) la 0v lead angle 0 la v adc lead angle 22.5 (in case of inputting the voltage of v adc or more.) step la (v) lead angle () step la (v) lead angle () step la (v) lead angle () 0 0.00 0.0 6 0.82 8.4 12 1.65 16.9 1 0.14 1.4 7 0.96 9.8 13 1.78 18.3 2 0.27 2.8 8 1.10 11.3 14 1.92 19.7 3 0.41 4.2 9 1.23 12.7 15 2.06 21.1 4 0.55 5.6 10 1.37 14.1 16 2.19 22.5 5 0.69 7.0 11 1.51 15.5 lead angle http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 21 10. lock protection it monitors the motor rotation by the hall signal and oper ates when the zero cross of the hall signal can not be detected for certain time (t on ) or more. when lock protection operates, the upper output transistor is turned off for 1ms(typ) and then all output power transistors ar e turned off. the motor drive resumes certain time (t off ) after the lock protection operates. t on = 0.4s (typ) t off = 4s (typ) fg is outputted by the hall signal even while the lock protection is operating. in case the zero cross of the hall sign al is detected twice in re-startup, th e lock protection is cleared and the rdo signal outputs low again. 11. quick start during t off of lock protection, lock protection is clea red when the voltage of vsp pin is set to v ad(l) or less. when v ad(l) or more is applied to the vsp pin again, the mo tor restarts operating quickly without waiting for the end of the t off term. because the voltage of vsp pin is detected through a/d circuit, the voltage of vsp pin should be kept at v ad(l) or less for vsp response time (t vsp ) or more in order to clear the lock protection. quick start is disabled wh en the minimum of the duty is config ured by applying the voltage of v ad(l) or more to vmi pin. 1ms 1ms 1ms 0.55v http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 22 12. current limit this function operates when the output voltage reaches the current limit detection voltage (vrs = 0.3 v (typ)). it is detected by the resistor rf. when r f =0.51 ? , i out =0.3v (typ)/0.51 ? =588ma during the current limit operation, the operation mode is moved to pwm off state by turning off the upper output power transistor. the operation resumes at the next pwm on timing. masking time is configured to avoid malfunction by noise. (in case hp = l and hm = h) over current detection voltage (v rs ) current value which over current protection operates (i out ) = detection resistance (r f ) rs ?R ?? ?g 2us out1 out2 ? pwm 0.3v (typ) 1.5 s voltage of rs pin detection term of current limit internal pwm m out1 out2 vm rs r f i out 0.3v http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 23 13. over current protection (isd) detection of current of the output power transistor is incorporated. each current flowing through four power transistors is detected individually. when the current exceeds the detection value, the related output power transistor is tu rned off. then all output power transistors are turned off 1ms(typ) after this related output power transistor is turned off. timer is incorporated in this circuit. the motor op eration resumes off time of 100ms (typ) after the over current is detected. when state of over current continues, over current prot ection operates repeatedly. in case this protection operates 8 times repeatedly, the moto r operation does not resume automatically. the output power transistor keeps turned off. in order to clear this state, vsp or the power supply should be applied again. design target value of current limit for over current protection is 2.5a. masking term of 2 s (typ) is configured to avoid malfunction by noisy pulse current. 14. thermal shutdown circuit (tsd) thermal shutdown circuit (tsd) operates when t j rises to 170 (typ) or more. all output power transistors are turned off after a 1ms(typ) pwm off term during which upper output power transistor is turned off. the operation resumes when th e temperature falls to 130 (typ) or less. 15. under voltage lockout protection (uvlo) this ic has an under voltag e lockout protection (uvlo). the power supply voltage of vm and the voltage of vreg are monitored. when each of them falls to 2.9 v (typ) or less, it is recognized as low voltage and the circuit is turned off. the normal operation resumes when both voltage recovers to 3.2v (typ) or more. junction temperature internal tsd signal normal operation normal operation 2.8v (typ) 3.1v (typ) vm?R vreg?R ?uvlo ? ? ? out1,out2 fg,rdo uvlo 2.9v 3.2v vm voltage vreg voltage internal uvlo normal operation normal operation uvlo protection http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 24 package dimensions p-wqfn16-0303-0.50-002 unit: mm 0.1 s 1.5 3.0 3.0 1.5 0.5 (0.75) a (0.75) 0.5 b 0.300.07 1.500.05 1.500.05 0.05 m s ab 0.1sab 4 14 5 8 9 12 13 16 0.250.05 s 0.700.05 0.75max 0.05max 0.75max 0.05 s http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 25 notes on contents 1. block diagrams some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. equivalent circuits the equivalent circuit diagrams may be simplified or some parts of them may be omi tted for explanatory purposes. 3. timing charts timing charts may be simplified for explanatory purposes. 4. application circuits the application circuits shown in this document are provided for reference purp oses only. thorough evaluation is required, especially at the ma ss production design stage. toshiba does not grant any license to any industrial property rights by providing these exam ples of application circuits. 5. test circuits components in the test circuits are used only to obtain and confirm the device characteristics. th ese components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. ic usage considerations notes on handling of ics [1] the absolute maximum ratings of a semiconductor device ar e a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. [2] use an appropriate power supply fuse to ensure that a large current does not continuously fl ow in case of over current and/or ic failure. the ic will fully break down when used under conditions that exceed its absolu te maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs fr om the wiring or load, causing a large current to continuously flow and the br eakdown can lead smoke or ignition. to minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. [3] if your design includes an inductiv e load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from th e inrush current at power on or the negative current resulting from the bac k electromotive force at power off. ic breakdown may cause injury, smoke or ignition. use a stable power supply with ics with built-in protection function s. if the power supply is unstable, the protection function may not operate, causing ic breakdown. ic breakdown may ca use injury, smoke or ignition. [4] do not insert devices in the wrong orientation or incorrectly. make sure that the positive and negative terminals of power supplies are connected properly. otherwise, the current or power cons umption may exceed the absolute maximu m rating, and exceeding the rating(s) may cause the device breakdow n, damage or deterioration, and may resu lt injury by explosion or combustion. in addition, do not use any device that is applied the curre nt with inserting in the wron g orientation or incorrectly even just one time. http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 26 points to remember on handling of ics (1) over current pr otection circuit over current protection circuits (referred to as current limiter circuits) do not necessarily protect ics under all circumstances. if the over curre nt protection circuits operat e against the over current, cl ear the over current status immediately. depending on the method of use and usage conditions, su ch as exceeding absolute ma ximum ratings can cause the over current protection circuit to not operate properly or ic breakdown before operation. in addition, depending on the method of use and usage conditions, if over current continues to flow for a long time after operation, the ic may generate heat resulting in breakdown. (2) thermal shutdown circuit thermal shutdown circuits do not necessarily protect ics und er all circumstances. if the thermal shutdown circuits operate against the over temp erature, clear the heat generation status immediately. depending on the method of use and usage conditions, su ch as exceeding absolute ma ximum ratings can cause the thermal shutdown circuit to not operate prop erly or ic breakdown before operation. (3) heat radiation design in using an ic with large current flow such as power amp, re gulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (t j ) at any time and condition. these ics generate heat even during normal use. an inadequate ic heat radiation design can lead to decrease in ic life, deterioration of ic characteristics or ic breakdown. in addition, please design the device taking into considerate the effect of ic heat radiation with peripheral components. (4) back-emf when a motor rotates in the reverse direction, stops or sl ows down abruptly, a current flow back to the motor?s power supply due to the effect of back-emf. if the current sink capability of the power supply is small, the device?s motor power supply and output pins might be exposed to condit ions beyond absolute maximum ratings. to avoid this problem, take the effect of back-emf into consideration in system design. http://www..net/ datasheet pdf - http://www..net/
TC78B002FTG 2013-03-19 27 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collect ively "toshiba"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduced wi thout prior written permission from toshiba. even with toshib a's written permission, reproduction is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product's quality a nd reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for providing adequate desi gns and safeguards for their hardware, software and systems which minimize risk and avoid situati ons in which a malfunction or failure of product could cause loss of human life, bodily injury o r damage to property, including data loss or corruption. before customers us e the product, create designs including the product, or incorpo rate the product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specificat ions, the data sheets and applicati on notes for product and the prec autions and conditions set forth in the "toshiba se miconductor reliability handbook" and (b) the instructions for the application with whic h the product will be used with or for. customers are solely responsible fo r all aspects of their own produc t design or applications, includi ng but not limited to (a) determining the appropriateness of the use of this produc t in such design or applicati ons; (b) evaluating and determinin g the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application c ircuits, or any other referenced documents; and (c) validating all operat ing parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? product is neither intended nor warranted for use in equipments or systems that require extraordinarily high levels of quality and/or reliability, and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage and/or serious public impact ( " unintended use " ). except for specific applications as expressly stated in this document, unintended use includes, without limitation, equipment used in nuclear facilities, equipment used in the aeros pace industry, medical equipmen t, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions, safety device s, elevators and escalators, devices related to electric pow er, and equipment used in finance-related fields. if you use product for unintended use, toshiba assumes no liability for product. for details, please contact your toshiba sales representative. ? do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy product, whether in whole or in part. ? product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations. ? the information contained herein is pres ented only as guidance for product use. no re sponsibility is assumed by toshiba for an y infringement of patents or any other intellectual property rights of third parties that may result from the use of product. no license to any intellectual property right is granted by this document, w hether express or implied, by estoppel or otherwise. ? absent a written signed agreement, except as provided in the relevant terms and conditions of sale for product, and to the maximum extent allowable by law, toshiba (1) assumes no liability whatsoever, including without limitation, indirect, consequential, speci al, or incidental damages or loss, including without limitation, loss of profits, loss of opportunities, business interruption and loss of data, and (2) disclaims any and all express or implied warranties and conditions related to sale, use of product, or information, including warranties or conditions of merchantability, fitness for a particular purpose, accuracy of information, or noninfringement. ? do not use or otherwise make available product or related so ftware or technology for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, c hemical, or biological weapons or missile technology pr oducts (mass destruction weapons). product and related software and technol ogy may be controlled under the applicable export laws and regula tions including, without limitation, the japanese foreign exchange and fo reign trade law and the u.s. export administration regulatio ns. export and re-export of product or related software or technology are st rictly prohibited except in compliance with all applicable exp ort laws and regulations. ? please contact your toshiba sales representative for details as to environmental matters such as the rohs compatibility of pro duct. please use product in compliance with all applicable laws and regula tions that regulate the inclusion or use of controlled subs tances, including without limitation, the eu rohs directive. toshiba assumes no liability for damages or losses occurring as a result of noncompliance with applicable laws and regulations. http://www..net/ datasheet pdf - http://www..net/

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